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ADE7753
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
RESET 1
DVDD 2
AVDD 3
20 DIN
19 DOUT
18 SCLK
V1P 4
V1N 5
ADE7753
TOP VIEW
17 CS
16 CLKOUT
V2N 6 (Not to Scale) 15 CLKIN
V2P 7
AGND 8
REF IN/OUT 9
DGND 10
14 IRQ
13 SAG
12 ZX
11 CF
02875-0-005
Figure 5. Pin Configuration (SSOP Package)
Table 4. Pin Function Descriptions
Pin No.
Mnemonic
Description
1
RESET
Reset Pin for the ADE7753. A logic low on this pin holds the ADCs and digital circuitry (including the serial
interface) in a reset condition.
2
3
4, 5
6, 7
8
9
10
11
DVDD
AVDD
V1P, V1N
V2N, V2P
AGND
REF IN/OUT
DGND
CF
Digital Power Supply. This pin provides the supply voltage for the digital circuitry in the ADE7753. The
supply voltage should be maintained at 5 V ± 5% for specified operation. This pin should be decoupled to
DGND with a 10 μF capacitor in parallel with a ceramic 100 nF capacitor.
Analog Power Supply. This pin provides the supply voltage for the analog circuitry in the ADE7753. The
supply should be maintained at 5 V ± 5% for specified operation. Every effort should be made to minimize
power supply ripple and noise at this pin by the use of proper decoupling. The typical performance graphs
show the power supply rejection performance. This pin should be decoupled to AGND with a 10 μF
capacitor in parallel with a ceramic 100 nF capacitor.
Analog Inputs for Channel 1. This channel is intended for use with a di/dt current transducer such as a
Rogowski coil or another current sensor such as a shunt or current transformer (CT). These inputs are fully
differential voltage inputs with maximum differential input signal levels of ±0.5 V, ±0.25 V, and ±0.125 V,
depending on the full-scale selection—see the Analog Inputs section. Channel 1 also has a PGA with gain
selections of 1, 2, 4, 8, or 16. The maximum signal level at these pins with respect to AGND is ±0.5 V. Both
inputs have internal ESD protection circuitry, and, in addition, an overvoltage of ±6 V can be sustained on
these inputs without risk of permanent damage.
Analog Inputs for Channel 2. This channel is intended for use with the voltage transducer. These inputs are
fully differential voltage inputs with a maximum differential signal level of ±0.5 V. Channel 2 also has a PGA
with gain selections of 1, 2, 4, 8, or 16. The maximum signal level at these pins with respect to AGND is
±0.5 V. Both inputs have internal ESD protection circuitry, and an overvoltage of ±6 V can be sustained on
these inputs without risk of permanent damage.
Analog Ground Reference. This pin provides the ground reference for the analog circuitry in the ADE7753,
i.e., ADCs and reference. This pin should be tied to the analog ground plane or the quietest ground
reference in the system. This quiet ground reference should be used for all analog circuitry, for example,
anti-aliasing filters, current and voltage transducers, etc. To keep ground noise around the ADE7753 to a
minimum, the quiet ground plane should connected to the digital ground plane at only one point. It is
acceptable to place the entire device on the analog ground plane.
Access to the On-Chip Voltage Reference. The on-chip reference has a nominal value of 2.4 V ± 8% and a
typical temperature coefficient of 30 ppm/°C. An external reference source can also be connected at this
pin. In either case, this pin should be decoupled to AGND with a 1 μF ceramic capacitor.
Digital Ground Reference. This pin provides the ground reference for the digital circuitry in the ADE7753,
i.e., multiplier, filters, and digital-to-frequency converter. Because the digital return currents in the ADE7753
are small, it is acceptable to connect this pin to the analog ground plane of the system. However, high bus
capacitance on the DOUT pin could result in noisy digital current, which could affect performance.
Calibration Frequency Logic Output. The CF logic output gives active power information. This output is
intended to be used for operational and calibration purposes. The full-scale output frequency can be
adjusted by writing to the CFDEN and CFNUM registers—see the Energy-to-Frequency Conversion section.
Rev. C | Page 9 of 60
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